Need help for Watchdog example ZILOG ez Z8F6422

[Holger]

; ****************************************
.DEF _set_watch_dog_timer_regs ;  Make a <prototype>
 segment CODE
; *************************

_set_watch_dog_timer_regs: ; cF1,cF2,cF3
 ; DI ; No IRQs
 PUSH R15 ; push save working reg
 PUSH R14 ; push save working reg
    LDX  R14,XSPH ; save Stack-PointerH to R14
    LDX  R15,XSPL ; save Stack-PointerL to R15
    SUBX XSPL,#%03
    SBCX XSPH,#%00
     ; first load all R0,R1,R2 Registers from C-Stack
     LDX  R0,4(RR14) ; Register Relativ from R14 to R0 Grab F1 passed
8-Bit parameter
     LDX  R1,5(RR14) ;Grab F2 passed parameter
     LDX  R2,6(RR14) ;Grab F3 passed parameter
      ; unlock
     LDX  WDTCTL, #%55   ; first  Unlock
     LDX  WDTCTL, #%AA   ; second Unlock
     ; Coseqently store registers
     LDX WDTU,R0  ; load in WDT-Upper Reg.
     LDX WDTH,R1  ; load in WDT-Higer Reg.
     LDX WDTL,R2  ; load in WDT-Lower Reg.
    ;
   LDX  XSPL,R15 ; Restore Stack-PointerL from R15
   LDX  XSPH,R14 ; Restore Stack-PointerH from R14
 POP  R14
 POP  R15
 ; EI
 RET

[Holger]

 
See upper Code: 

    LDX  WDTCTL, #%55   ; first  Unlock
    LDX  WDTCTL, #%AA   ; second Unlock   
 ; Coseqently store registers
     LDX WDTU, #%00  ; load in WDT-Upper Reg.         
     LDX WDTH, #%27  ; load in WDT-Higer Reg.   
     LDX WDTL, #%10  ; load in WDT-Lower Reg.   

This works now, but only with immediate adressing


     LDX WDTU, #%00  ; load in WDT-Upper Reg.         
     LDX WDTH, #%27  ; load in WDT-Higer Reg.   
     LDX WDTL, #%10  ; load in WDT-Lower Reg.   


This is the WDOG  Parameter for 1 Second, at @20Mhz CPU Clock.

[Holger]

See upper Code: 

    LDX  WDTCTL, #%55   ; first  Unlock
    LDX  WDTCTL, #%AA   ; second Unlock   
 ; Coseqently store registers
     LDX WDTU, #%00  ; load in WDT-Upper Reg.         
     LDX WDTH, #%27  ; load in WDT-Higer Reg.   
     LDX WDTL, #%10  ; load in WDT-Lower Reg.   

This works now, but only with immediate adressing


     LDX WDTU, #%00  ; load in WDT-Upper Reg.         
     LDX WDTH, #%27  ; load in WDT-Higer Reg.   
     LDX WDTL, #%10  ; load in WDT-Lower Reg.   


This is the WDOG  Parameter for 1 Second, at @20Mhz CPU Clock.
The WDTimer is 10Khz

100000/10000 = 1000 = 1000 millisecons = 1SEK

[Holger]

XP F082A WDOG is ok.
WDOG1.zip is ASM and a C Modul.
The Asm works fine now.

void param_WDOG_reg (void)
{
// unlock
asm("LDX %FF0,#%55");// first  Unlock
asm("LDX %FF0,#%AA");// second Unlock

 // Coseqently store registers
asm("LDX %FF3,#%00");
asm("LDX %FF2,#%FF");
asm("LDX %FF1,#%10");
};
but the C Module doesent param.
http://www.mikrocontroller.net/attachment/63008/WDOG1.zip

http://www.mikrocontroller.net/topic/156990#new

 #define OSC_UNLOCK_SEQ1 0xE7
 #define OSC_UNLOCK_SEQ2 0x18
void Init_Oszi (void)
{
 OSCCTL = OSC_UNLOCK_SEQ1; // Unlock sequence for OSCTL write
 OSCCTL = OSC_UNLOCK_SEQ2; //
//  0x80 = Bit 5 INTEN Internal Precision Oscillator Enable
//  0x20 = Bit 7 Watchdog Timer oscillator is enabled

 OSCCTL  = (0x80 | 0x20 );
// make a short delay ::::: then call
}

['yus]

maybe you can also get some sample codes here: ZiLOG's Application Sample Libraries

I made a WDT demo code based on ZiLOG's sample:
http://www.electronicslab.ph/forum/index.php/topic,8340.msg238048.html#msg238048

[Holger]

 /**********************************************************************
 WDOG Reaload-Timeout by Parameter setting, with Macro define
Compiler independent, but you must write c3h and not 0xc3 ….
 **********************************************************************/
#define WDT_SET_RELOAD(RelUpr, RelHi, RelLo) \
   do \
      { \
      asm("LDX %FF0,#55h"); \
      asm("LDX %FF0,#%AA"); \
        asm("LDX %FF1,#"#RelUpr); \
      asm("LDX %FF2,#"#RelHi); \
      asm("LDX %FF3,#"#RelLo); \
      } \
   while(0)
/***********************************************************************/

 void main(void)
{
  WDT_SET_RELOAD(0h, c3h, 3ch);
 }

/***********************************************************************/

[Holger]

This asm Code as wdog.asm below is for Z8F6422 MCU, with the Compiler
Zilog IDE version 4.11 (08050501)
The wdog.asm is included with the other c.files in the Project.
You see the Registers are now R8,R9,R10, to store the 24Bit WDOG reload parameters. 
The Call in C Lang. is
set_watch_dog_timer_regs( 0x00, 0xC3, 0x50 );  // 1s
The three C params now goes over  Register.R8,R9,R10 in the new Compiler
Zilog IDE version 4.11 (08050501) for a Project is for Z8F6422 MCU

For the first issue form Year 2002 Zilog IDE version 4.1 (2002101101)
The Registers are  load all R0,R1,R2 Registers from C-Stack
respectivly
 LDX  R0,4(RR14)
 LDX  R1,5(RR14) ;Grab F2 passed parameter 
ect .

 LDX WDTU,R0  ; load in WDT-Upper Reg.         
ect.
See the Registers are different for the different Compiler Versions.
For a Z8F6422 MCU Project.
That’s tricky, because if you use a Z8XP derivat like this Z8F08A, the Registers are
R0,R1,R2 Registers from C-Stack, in the IDE Zilog IDE version 4.11 (08050501)

 

 .include "ez8.inc"
; Letzter Stand: 12.12.09 **************************
.DEF _set_watch_dog_timer_regs ;  Make a <prototype>
 segment CODE
; *************************

_set_watch_dog_timer_regs: ; cF1,cF2,cF3
 ; DI ; No IRQs
 PUSH R15 ; push save working reg 
 PUSH R14 ; push save working reg 
   ; LDX  R14,XSPH ; save Stack-PointerH to R14
   ; LDX  R15,XSPL ; save Stack-PointerL to R15
   ; SUBX XSPL,#%03
   ; SBCX XSPH,#%00
   ; first load all R0,R1,R2 Registers from C-Stack
   ;  LDX  R0,4(RR14) ; Register Relativ from R14 to R0 Grab F1 passed 8-Bit parameter
   ;  LDX  R1,5(RR14) ;Grab F2 passed parameter 
   ;  LDX  R2,6(RR14) ;Grab F3 passed parameter
  ; unlock
   LDX  WDTCTL, #%55   ; first  Unlock
   LDX  WDTCTL, #%AA   ; second Unlock   
   ; Coseqently store registers
   ; Zilog IDE version 4.11 (08050501)
   ; Neue C Fu. Parameter auf ASM
   ; mit Register Uebergabe.
   LDX WDTU,R8  ; load in WDT-Upper Reg.         
   LDX WDTH,R9  ; load in WDT-Higer Reg.   
   LDX WDTL,R10 ; load in WDT-Lower Reg.   
 
    ; LDX WDTU,R0  ; load in WDT-Upper Reg.         
    ; LDX WDTH,R1  ; load in WDT-Higer Reg.   
    ; LDX WDTL,R2  ; load in WDT-Lower Reg.     
    ;  LDX WDTU, #%00  ; load in WDT-Upper Reg.         
    ; LDX WDTH, #%27  ; load in WDT-Higer Reg.   
    ; LDX WDTL, #%10  ; load in WDT-Lower Reg.     
    ;
   ;LDX  XSPL,R15 ; Restore Stack-PointerL from R15
   ;LDX  XSPH,R14 ; Restore Stack-PointerH from R14
 POP  R14
 POP  R15
 ; EI
 RET 
; ***********************