jep-pogi - I am not a master either but let me try if I can help here.
Below I have redrawn your schematic into a simplified one. I removed the filter caps and their corresponding balancing resistors and replaced your current circuit with a current source symbol.
I replaced Q1 and Q2 with Qs to help in the explanation that follows.
As mentioned by labgruppen, the output circuit is just a voltage follower. So with Qs shown, it is clear that we have a voltage follower. As a follower the output at the emitter is almost equal to the input at the base. Vout = 71.4V is practically equal to Vin-base = 72V. The base of Qs is pegged (naka-pako) at 72V by the zener chain no matter how the supply voltage input varies (85 ~ 120VDC). The Ve of Qs will approx. be 0.6V less than its Vb so it will be at 71.4V. The Vce of Qs will be 13.6V at a Vsupply in of 85VDC. Under this condition, Qs is operating in linear mode (you call it forward active region) because it is not fully off and not fully on (not in saturation). What forces this condition - operation in the linear region - to occur? Negative feedback.
How does negative feedback happen here?
Imagine that the output voltage at the emitter of Qs starts to rise for whatever reason. Since the base of Qs is pegged at 72V, its Vbe has no choice but to decrease. As Vbe starts to decrease (drop below 0.6V) its base current decreases too causing the conduction of Qs to decrease (collector current decrease) also. This decrease in conduction of Qs is like Qs increasing its resistance between collector and emitter. If the resistance of Qs increases, the voltage drop across it will increase. This voltage drop across Qs will cause the voltage across the load (same as the Vout voltage at the emitter of Qs) to drop.Thus the rise in output voltage is opposed. This feedback mechanism will insure that the emitter voltage of Qs will never be higher than its base voltage> This means the condition that your output voltage will be higher than your zener voltage can not happen (unless there is something wrong in the circuit).
As you can see on the right side of the drawing, Qs is represented by a variable resistor in series with the load. That is exactly what Qs (series pass transistor) does - to act as a variable resistor in series with the load. Another way of looking at it is > Qs and the load forms a voltage divider. In this voltage divider, the resistance of Qs is controlled automatically so that the voltage drop across the load is kept constant. What produces this automatic control? The zener chain that keeps the base voltage of Qs constant and the negative feedback just described.
Why not just use one transistor Qs instead of having Q1 and Q2? Because the base current needed for Qs will be quite large. If your output current is 2.25A max and the hfe of Qs is 15 only for example, the base current needed will be 150mA. You will need a larger current source and you will need high wattage zeners to absorb the surplus current when Qs needs less base current at no load conditions.
Below is your circuit with Q1 (NPN) and Q2 (PNP) shown (but still simplified to make it easier to understand).
So in this case the large base current of Q2 (PNP transistor) is supplied by Q1. The smaller base current of Q1 is supplied by the current source. As as result the surplus current at no load is small enough to be absorbed by the zeners. Both Q1 and Q2 also operates in the linear region unless your Vsupply_in drops too low - approaching 72V - under this condition they could saturate. Just remember Q1 and Q2 acts like one big transistor - like Qs. At this point I leave the rest of the details for you to figure out.