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buffer configurations
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Topic: buffer configurations (Read 2059 times)
'yus
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buffer configurations
«
on:
May 21, 2008, 07:01:52 PM »
may nakita na akong actual jtag-dsp programmer...
and na-"draw" ko na rin ang schematics nya.. hehe
(hopefully tama ang pagkaka-draw ko based sa pcb layout)..
medyo nagtataka lang ako sa circuit design nila..
U1=HC125; U2= HC04; U3=HC14
questions:
1) bakit nag-cascade pa sila ng dalawang inverter para lang magkaroon ng isang buffer?
2) bakit gumamit pa sila ng tri-state buffer, eh lagi naman naka-enable ?
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buffer configurations
«
on:
May 21, 2008, 07:01:52 PM »
deanc
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Re: buffer configurations
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Reply #1 on:
May 21, 2008, 07:06:54 PM »
Two inverters in series, para yung output will reflect the input logic, although they could have used a non-inverting buffer to do the job, mas low power pa.
Sa tri-state buffer, wala kasi yatang regular buffers na apat lang ang number ng gates puro anim.
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Re: buffer configurations
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Reply #1 on:
May 21, 2008, 07:06:54 PM »
'yus
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Re: buffer configurations
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Reply #2 on:
May 21, 2008, 07:18:54 PM »
para kasing dumami pa yung ginamit na ICs? parang hindi cost-effective?
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Re: buffer configurations
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Reply #2 on:
May 21, 2008, 07:18:54 PM »
Born2BeWired
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Re: buffer configurations
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Reply #3 on:
May 21, 2008, 07:58:12 PM »
I do not know anything about this jtag-dsp application but I could make an educated guess.
Hardware designers usually resort to this scheme for timing delay compensation. Ginagamit nila ang propagation delay between gates para maitama ang timing. Maybe the propagation delay of P2 to J9-J11 is too long, hence the rest must pass through another gate to allow J9-J11 to catch up.
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Re: buffer configurations
«
Reply #3 on:
May 21, 2008, 07:58:12 PM »
deanc
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Re: buffer configurations
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Reply #4 on:
May 21, 2008, 08:08:48 PM »
It escapes me hehehehe
Yup, propagation delays could be another reason for this
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Re: buffer configurations
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Reply #4 on:
May 21, 2008, 08:08:48 PM »
rdpzycho
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Re: buffer configurations
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Reply #5 on:
May 21, 2008, 08:40:35 PM »
kung DIY JTAG, karamihan ng reason, availability ng IC sa lugar nila.
yun namang permanently enabled na tri-state, based siguro sa mga commercial JTAG adapters yun. yung sa TI kasi, may allocation na pang-disable nung tri-state. pero based sa mga DIYers, aandar naman kahit hindi siya i-connect kaya napepermanent na sila. karamihan ng DIY JTAG ganun ang design. 74xx244 or ibang bus driver na tied yung enable.
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'yus
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Re: buffer configurations
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Reply #6 on:
May 21, 2008, 09:38:17 PM »
yung schematic sa taas hindi sya DIY..
di na ako magbabanggit ng name ng manufacturer, baka i-trace ako.. hehe
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rdpzycho
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Re: buffer configurations
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Reply #7 on:
May 21, 2008, 09:44:44 PM »
hehehe. 3rd party manufacturer.
some 3rd party manufacturers are actually better hardware DIY lang.
yung Olimex JTAG Wiggler compatibles, based din sa DIY design. pero some of their products, nag-reverse engineer sila ng code nung On-Circuit Debugger. yung JTAG naman nila for MSP430, same design dun sa programmer mismo ng TI.
adaptable din siya for other JTAG-enabled devices. pero depende sa software.
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"Divide each difficulty into as many parts as is feasible and necessary to resolve it."
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'yus
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Re: buffer configurations
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Reply #8 on:
May 21, 2008, 09:53:24 PM »
3rd part sila..
OT:
dun nga pala sa schematic, P's correspond to pins ng parallel port, J's correspond to pins ng JTAG..
pag nahiram ko ulit, i-indicate ko na rin yung actual jtag pin names nya..
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0b00000111
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Re: buffer configurations
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Reply #9 on:
June 11, 2008, 08:33:06 PM »
siguro ang use ng buffer jan is for mild protection ng parallel port... para kung may mauunang masira, yung mga buffers muna... hehehehe
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'yus
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Re: buffer configurations
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Reply #10 on:
June 11, 2008, 08:35:02 PM »
saka, gumamit sila pareho ng logic gates na may
schmitt trigger
..
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Re: buffer configurations
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Reply #11 on:
June 11, 2008, 08:39:46 PM »
Quote from: yus on June 11, 2008, 08:35:02 PM
saka, gumamit sila pareho ng logic gates na may
schmitt trigger
..
sabagay mas ok nga kung may schmitt trigger... gagawa din ako nito within this month.. nakagawa ka na ba?
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'yus
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Re: buffer configurations
«
Reply #12 on:
June 11, 2008, 08:43:13 PM »
off-topic:
Quote from: Estudyante on June 11, 2008, 08:39:46 PM
.. nakagawa ka na ba?
natigil ako sa freescale ng dumating yung renesas.. hehe
balitaan mo na lang ako sa JTAG programmer saka... saka baka may link ka na dyan nung CodeWarrior?
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Re: buffer configurations
«
Reply #12 on:
June 11, 2008, 08:43:13 PM »
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