Failed simple smps design: A case study

[Born2BeWired]

ayos, ganda ng discussion dito!

Yes sir, naglalabasan ang mga technique. Later, I will try to explain the details. I just can't do it now, nasa office ako. Every minute or so, I have to leave my desk to mind something else

OT: same here sir. nagpalit na rin sila ng mga lines dati pero ganun pa rin disconnected every 5 to 15 minutes from 10PM to 1AM.

Mas OK ang sayo sir. My service is available only in the morning. Pag hapon na, parang christmas light na yung DSL indicator ng modem. 6 pm onwards, mas OK pa ang dial-up. Ganuon na ba talaga ang service ng PLDT dsl? If you call their help desk, you will be given just a tour duon sa standard troublehooting steps nila. If it connects during the call, they consider their job accomplished. No real work is done. . Ganito na yung pldt dsl ko for the past 6 months, nagsawa na ako sa kakatawag sa help desk nila.

[rdpzycho]

^ OT: napansin ko lang 'to sir nung dumami 'yung business lines sa paligid namin. before nagkaroon ng malalaking net cafe sa paligid namin, umaabot ng 2Mbps ang connection namin withtout interruption kahit buong linggong nakasindi.

on topic: sigurado marami pa kayong techniques sir. sa techonline, TI Analog webinar, madalas marami rin silang nadadaanang test methods. kung tama pagkakaalala ko, nadaanan na dun 'yung coax loop, looping ng ground cable sa body ng probe (pero after pinakita na mas effective talaga 'yung alisin na lang 'yung sleeve at direct connect sa board, and on some tests linagyan nila ng capacitor sa dulo). marami pang nadaanan dun. 'yung determination pala kung mas prominent 'yung common mode noise pinakita by shorting the probe tip and ground ng probe.

[Born2BeWired]

Schematic of the simple switcher :



The ferrite bead (in the picture at the thread start- the black component standing besides the powerlytic capacitor) reduced the high frequency ringing at the output (not quite enough), but it is more of a stop gap measure, not an elegant solution. Suppressing it right at the source is the better way of doing it. I will be bringing home tonight more beads to see what happens if a ferrite bead is connected in series with the coil L1 .

depende po talaga sa apps,sir born,sorry nalito ako dito sa discussion,iba naiisip ko regulation vs ripple,ripple po pala yung problem hehehe,btw una kasi basically we have to trouleshoot muna sa regulation kumabaga panghuli na po yung ripple,typical mga ripple consideration nasa 1% ng output(e.g. 5V dapat huwag lalampas sa 50mVpp).yung ripple kasi inherent na talaga yan sa switching elements(meron ata sa power supply magazine ripple theorem by vorperian,i think di ko na matandaan,sa CCM discussion paano nagkakaroon ng ripple)sa mga mosfets at catch diodes,dun naman sa sinabi ko about trr,basically sa budget loss malaki effect nya,sa ripple di naman masyado malaki effect,sa mga switch talaga kumbaga inherent na po yan talaga,pero dun sa nakikita ko sa sukat mo sir kung 5V ang output at 50mVpp marginal po yan dapat po talaga mababa,thanks nga po pala dun sa video ni jim williams sir born,about pala dun sa BW na 100Mhz na gusto mo,masyadong tight po yan,sa mga VRM modules typical apps po yan,kaya po nasabi ko na 20Mhz fairly enough as industry based.
sa nakikita kung solution,gagamit ka po talaga ng low esr caps to lower ripple noise.

Thanks for the invaluable info sir icefire. Now we have a yardstick we can use to evaluate the noise performance of our circuit.

[♪ ♫ ♫ ♪ ♪ ♪ ♫ ♫ ♫]

Wala bang computation sa mga component values?

Actually ito rin ang problema ko sa SMPS;

Wala pa akong nakitang procedure papaano ito e desenyo, nakakatakot kasi lalo nat aabot sa >300Vdc ang input nito    Sana may mag post ng tamang procedure papaano ito gagawin.

Sample problem ko:

1. Ano ba ang unang basehan ng component computation, yong Freq ba? o yong Inductor values as per specs ng power supply na gagawin?

2. Ano yong detalye ng Output Transformer computation?

I been reading SMPS threads hindi ko pa rin makuha 

[subzer0]

Thanks for the invaluable info sir icefire. Now we have a yardstick we can use to evaluate the noise performance of our circuit.

your welcome sir born2bewired 

[rdpzycho]

Wala bang computation sa mga component values?

Actually ito rin ang problema ko sa SMPS;

Wala pa akong nakitang procedure papaano ito e desenyo, nakakatakot kasi lalo nat aabot sa >300Vdc ang input nito    Sana may mag post ng tamang procedure papaano ito gagawin.

Sample problem ko:

1. Ano ba ang unang basehan ng component computation, yong Freq ba? o yong Inductor values as per specs ng power supply na gagawin?

2. Ano yong detalye ng Output Transformer computation?

I been reading SMPS threads hindi ko pa rin makuha  

medyo mahabang discussion 'to, deserves another thread, or pwede rin sa thread ni sis glutnix.

ang unang unang reference ko ay 'yung Switching Power Supply Design by Abraham Pressman. and then mga Application Notes at Design References sa TI (Burr Brown) mostly by Lloyd Dixon. wala akong formal education tungkol sa SMPS pero malaking tulong 'yang mga references na 'yan.

initially, lahat dependent sa actual supply. frequency, magde-depend din ang size ng inductor at transformer.

[nucleus]

I constructed an adjustable power switching regulator circuit using Allegro’s simple switcher A8447ST, hoping that I could share this circuit with anyone in this forum who would like to explore switching power supplies by building their own. The circuit I came up with is not so different from the datasheet circuit, modifying it just a bit to make it work respectably within desired output voltage range.

Using a 24VDC test source and ProDigit 3311 Electronic Load in 1Amp constant current mode as test load, I got a load and line regulation performance figure better than 1%; pretty good for this kind of circuit. Output voltage range measured 0.8VDC to 15VDC, and the IC worked with 80% efficiency at 5VDC output, keeping the IC running cool even at these low output voltage settings. But when output noise was measured, the results were so horrible, better to keep them hidden from view. This is basically a failed project. Why then am I posting it? Believe it or not, It could be more fun when circuits do not work as expected, because failures brings more opportunities to learn new things than some boring outright success. A failure is not a failure at all if you learn something from it.



The circuit, being built on a prototyping PCB without the benefit of ground planes and restricting layout, I actually expected it to have a noisy output. It is just that the output noise was far worse than I had hoped for. The problematic noise is the ringing that occurs during the switching transitions that oscillates with about a 100MHz frequency. The main switching inductor is the natural suspect that causes this problem, and it is actually easy to verify this.

If I clip the ground wire of my oscilloscope probe on its tip, I actually form a loop antenna capable of picking magnetic fields that happens to pass through the loop. The picture below shows what the probe loop picked up when it was put over the power supply PCB.





The toroidal inductor is leaking too much stray fields. Most of this stray energy are coupled with the components around it. There is very little we can do about it; this problem can be solved only by replacing the coil with one that has more adequate shielding.

We have to accept the fact the switching noise cannot be fully eliminated with SMPS circuit. The question is more on how much noise can be considered as acceptable? To answer this, I picked one similar simple switcher made by a reputable US company, and measured its output noise under similar test conditions, so that we can have something we can use as a baseline for comparison.

This simple switcher is based on LM2576S. The power inductor is the black cube with 101 (100uH)  markings. The PCB copper layout can be clearly seen in this photo.



During the tests, a 470uF low ESR capacitor was connected through J10 pads, where the regulator output is also drawn out.

This is the actual oscilloscope waveforms taken from the J10 output.



TDS784D Oscilloscope is band limited to 250MHz, with the vertical channel 1 set to 50mV/div ac coupled. Tek P6139A 1:10 probes are used. Trace shows ripple voltage of about 50mVp-p, with ringing appearing as spikes with 300mVp-p amplitude.

Is this noise low enough? I don't know, really .  Especially after I watched the video of Jim Williams measuring his SMPS circuit churning out noise at the microvolt level!
http://www.linear.com/designtools/video/ltchannel_switchregnoise.jsp

I seldom build SMPS circuits and lack the experience to say anything with confidence in this field.
Master Glutnix is the authority on this subject. I hope mabasa nya ito and throw in his expertise to further educate us.  

yung ginawa kong paraan sa mp3 player ng kapitbahay namin TL2575 ang ginamit ko "bara bara lang walang PCB wires lang " noisy sya merong nadidinig na matinis na tone sa transmitted audio nya "via FM" ang nagawa ko lang para mabawasan eh magdagdag ng magdagdag ng filter capacitor sa output pero pansin ko lang po habang nagdadagdag ako ng filter cap parang tumataas lang ang frequency ng tone na sumasama sa audio

[TinTopHack]

Born,

Looking at the diagram (buck regulator) and the waveforms, the second spike with ringing (the smaller one) is most likely due to the turning on of the MOSFET switch inside the A8447. The first spike is most likely due to the switching off where at this point also D1 starts to conduct as the inductor releases its energy (kickback) through D1 and to the output cap COUT. Critical is the common ground of CIN, COUT and D1.

It will be interesting to see the waveform at LX. This should give a fairly good idea about the source of spikes and ringing.

These spikes can be reduced by adding snubbers BUT before doing that it is best to have a better PCB layout first as recommended in the A8447 datasheet (I copied the recommendation below) so that ground bounce is reduced. Ground bounce is a common problem in prototypes. It can cause lots of problems including instability, oscillations/ringing, higher noise, etc.

We also need to make a distinction between 2 things:

First, the switching noise which is the one seen at the output when probed using a scope. These are spikes and ringing mentioned above that comes from node LX. Better layout (plus maybe snubbers later) can reduce this noise.

Second the radiated noise which can be picked up by the scope probe ground wire loop. This can be reduced by shielding the inductor and the HV switching node (PCB tracks for the switching node) in order to pass EMI regulations. This node is the point connected to LX pin. When conducted noise is reduced, usually radiated noise is also reduced. So the amount of effort spent on reducing switching noise will have a big impact on radiated noise.



RECOMMENDED PCB LAYOUT - from A8447 data sheet.

In order to minimize the effects of ground bounce and offset issues, it is important to have a low impedance ground located very close to the device. This grounding scheme is known as star grounding. It is likely that a ground plane will be necessary to meet thermal requirements. The recommended land pattern illustrates how to create a low impedance ground that will also assist with removing thermal energy from the device. The input capacitor must be placed as close as possible to the VIN terminal because during the on cycle it is responsible for supplying the current to the switcher. During the off cycle, the current path is from the negative terminal of the COUT cap, through the diode and inductor, and then to the load. As a result, COUT and the rectifier diode must share the connection at the
negative terminal of the CIN capacitor in order to reduce ground bounce when the diode is conducting.

The inductor should be connected as close as possible to the switching node to minimize noise. Some applications may require a shielded inductor due to EMI restrictions. This will depend on the application and parameters defined by the system that will host the regulator. The high voltage-switching node could affect RTSET. If longer off-times are used, the resistance on the RTSET pin can be quite large. When designing the layout, try to keep RTSET away from the inductor and switching node. It is also beneficial to keep the trace as short as possible to reduce the effect of noise injection. Because of this layout guideline, the TSET pin is located on the other side of the device, away from the switching node. The FB resistor network should have a lower impedance to avoid interference from the switching node. Because the impedance on the FB node can be controlled, it is not as critical to keep the network isolated. It is important to keep the ground trace short so that ground bounce cannot effect the output voltage regulation.

[Born2BeWired]

Adding ferrite beads in series with the inductor? While on my way home- that's one of the few moments when I am not distracted and can do some real thinking, I almost blurted with laughter when I worked the idea in my mind. It was a dumb idea! Really dumb. Buti na lang di napansin ng mga masters  ;D.

@ Master TipTop

Thanks again for your important inputs. 

Like I always been telling everyone who care to listen:

PCB LAYOUT IS A PART OF THE CIRCUIT.

Identical circuits will perform differently with different layout.

Now I can say this is one of the reasons why I post this 'failed circuit'. SMPS circuit is very sensitive to layout, and this case makes a good working example.

As for the datasheet recommended layout, this is all taken cared of, at least that's what I believe, taking into account the limitations imposed by the prototyping board. If one is to look at the component arrangements in the picture, he/she can notice the components are arranged in the way recommended by the datasheet. The components are also wired as recommended. Later in fact, I plan to 'violate' these rules to demonstrate to the reader their effects.

[Born2BeWired]

Last night, in my home lab, I checked again the noise output of our circuit, and I got results very different from what I got in my office lab. Check this out:



This is the noise output I got, without the output ferrite. Way better than the noise level I measured in my office lab (which I am too embarrassed to show)



Improvements with the output ferrite installed and a 100uF Tantalum cap soldered across the load side of the ferrite. Note the input is now set at 10mV/div.



Same condition as the preceding picture but with oscilloscope bandwidth reduced to 20MHz. Noise out is only 7.2mVp-p!!

This morning, I brought the prototype back in my office lab and have it checked again. Noise "the horrible" is back!

This means, something is wrong with my instruments! Uh oh... Busy days ahead...

[subzer0]

Adding ferrite beads in series with the inductor? While on my way home- that's one of the few moments when I am not distracted and can do some real thinking, I almost blurted with laughter when I worked the idea in my mind. It was a dumb idea! Really dumb. Buti na lang di napansin ng mga masters  ;D.

@ Master TipTop

Thanks again for your important inputs. 

Like I always been telling everyone who care to listen:

PCB LAYOUT IS A PART OF THE CIRCUIT.

Identical circuits will perform differently with different layout.

Now I can say this is one of the reasons why I post this 'failed circuit'. SMPS circuit is very sensitive to layout, and this case makes a good working example.

As for the datasheet recommended layout, this is all taken cared of, at least that's what I believe, taking into account the limitations imposed by the prototyping board. If one is to look at the component arrangements in the picture, he/she can notice the components are arranged in the way recommended by the datasheet. The components are also wired as recommended. Later in fact, I plan to 'violate' these rules to demonstrate to the reader their effects.

sir born,
 
ok lang po yan,at least madami kaming natutunan sa thread na ito,medyo mahirap talaga gumawa ng SMPS kahit sabihin natin buck topology pa ito,dami kasing considerations,like Marty Brown's book said 2 types of design,first is the brute force design,eto yung medyo kailangan pag-aralan ng husto sa dami ng requirements na kailangan,second one is the datasheets design approach,eto naman yung app notes na makikita natin as per manufacturers suggestions,syempre mas ok yung second approach kasi may idea kana kung paano magsisimula at yung learning curve di gaano ka steep,you can save time to finish your project.
actually di naman po talaga failed sa nakikita ko yung sa case study na ginawa mo,fine tuning na lang po yan ok na,at least may output,kaysa naman wala.

[subzer0]

Last night, in my home lab, I checked again the noise output of our circuit, and I got results very different from what I got in my office lab. Check this out:



This is the noise output I got, without the output ferrite. Way better than the noise level I measured in my office lab (which I am too embarrassed to show)



Improvements with the output ferrite installed and a 100uF Tantalum cap soldered across the load side of the ferrite. Note the input is now set at 10mV/div.



Same condition as the preceding picture but with oscilloscope bandwidth reduced to 20MHz. Noise out is only 7.2mVp-p!!

This morning, I brought the prototype back in my office lab and have it checked again. Noise "the horrible" is back!

This means, something is wrong with my instruments! Uh oh... Busy days ahead...

pwede po magkamali yung instruments,baka yung probe po yung culprit but anyway congrats!pasado na po yan sir born,maganda din pang alis ng noise yung choke filter.ambaba ba yung ripple ok na po yan.

[TinTopHack]

Born,

That sounds interesting. The question is which set of instruments are telling the truth?

Or maybe... at work you have an external source of EMI that affects your circuit??? At home being not an industrial setting, the electrical environment is cleaner?

Anyway I like your ides of violating the rules and showing the effects...

BTW, belib ako sa yo. You have a Tek scope at home!!!! Big time!!! Kelan kaya ako magkaroon ng scope?

[nucleus]

post ko lang yung nakita ko sa website ng TI

http://www.ti.com/ww/en/analog/tps54620/index.shtml?DCMP=hpa_pmp_tps54620&HQS=EVM+BA+tps54620-bp

[TinTopHack]

ito yung kagandahan ng smps. high efficiency.

[Born2BeWired]

One cause had already been identified - our Prodigit electronic load actually induced more noise, and has to be sidelined for service. Even with the use of Kikusui PL 300W electronic load (same model I am using in my home workshop), the measured noise in our office lab is still an order of magnitude higher than in my home lab.Measurements taken from home showed consistent and repeatable results, so I think it is now safe to assume that the 7mV noise is the true figure.

There is one significant difference in the way my equipment is wired at home and in the office. My home installation have all my sensitive equipment powered through a mains isolation transformer. Test equipment in our office lab are all directly connected to the AC mains, sharing a common earth safety ground with the rest of the electrical equipment around (computers, power tools, etc). This is one of the cases when earth grounding is not a good thing. This may take a while to correct, as my project schedule will not allow me to turn off my equipment at this stage.

You have a Tek scope at home!!!! Big time!!! Kelan kaya ako magkaroon ng scope?

I cannot be separated with my tek scope very much the same way nucleus cannot be separated with his junebug. So much so, my wife strongly suspect me having an affair with my oscilloscopes.

[marcelino]

I cannot be separated with my tek scope very much the same way nucleus cannot be separated with his junebug. So much so, my wife strongly suspect me having an affair with my oscilloscopes.

hehehe...

i thinks my wife is starting to feel this way... this year was quite different from who am I. I think i fell in love with electronics... the other year, di naman!

sir born, are you "doing it" with your scope??? heheheh

[rdpzycho]

sir born, are you "doing it" with your scope??? heheheh

 

[Born2BeWired]

sir born, are you "doing it" with your scope??? heheheh

Whoa! Baka mabasa ni nucleus, magkaruon siya ng idea, at kung ano pa ang gawin nya sa junebug nya!

he he he!

[Born2BeWired]

At this point, let me have the pleasure of explaining some of the instrumentation techniques presented by our masters:

Sir motion twisted pair.
I have already shown you how any unassuming wire can act as an antenna when arranged to form a loop. How efficient it will pickup signals depends on so many things, but for the purposes of our current discussion (to keep it simple and short, it is the idea that counts), let us make the assumption that we are dealing mostly with the near field of the signal of interest [note 1]. The loop antenna is more sensitive to the magnetic component of the electromagnetic wave. The amount of signal picked up then is roughly proportional to the area formed by the loop. The larger the loop area, the more (noise) signal will be coupled to the wire [note 2]. This holds true as long as the circumference of the loop is significantly shorter than the wavelength of the signal of interest.

One does not need the IQ of a rocket scientist to figure out then that, to minimize noise pickup, we just need to keep the loop area as small as possible. How do we do that? That’s it, by twisting the wires together throughout its length. Twisting the wire together also has the added benefit of making the impedance more or less constant along the length of the wire. You may now stop wondering why every signal pair in your UTP cables are twisted together. Hindi dahil sa nababakla si Mr. Engineer kaya tinitirintas yung mga wires.

Sir TipTop probe.
This is closely related to the twisted wire we discussed above, plus some more. Even the 6” length of the probe’s ground clip will present a problem when probing high speed signals (RF). Asides from forming a loop that will pickup noise as discussed above, the inductance presented by the ground wire will distort the high frequency signals, resulting to false signals display in the oscilloscopes and confusing the unwary observer.

To prevent this, well, do not use the ground clip, and have the probe ground circuit connected as close to the probe tip as possible. This is as illustrated by sir TipTop in his hand drawings (that will make Picasso jealous if he were alive today ). Most probes have exposed ground shell near the probe tip made for this purpose, and even have accessories that you can use to make ground tip probing a bit easier.

Notes:

1. As a reference, the near field region of a 100MHz source extends up to 0.5m from the source. The near regions reach increases with decreasing frequencies.

2. It works the other way around. With RF currents passing through the wire, the loop antenna will radiate with more ease as the loop area is increased.